Added Arm64 feature detections in STL - #6067
Added Arm64 feature detections in STL#6067Stephan T. Lavavej (StephanTLavavej) merged 4 commits into
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@microsoft-github-policy-service agree company="Arm" |
FEAT_DotProd (PF_ARM_V82_DP_INSTRUCTIONS_AVAILABLE) FEAT_I8MM (PF_ARM_V82_I8MM_INSTRUCTIONS_AVAILABLE) FEAT_SHA3 (PF_ARM_SHA3_INSTRUCTIONS_AVAILABLE) FEAT_SVE (PF_ARM_SVE_INSTRUCTIONS_AVAILABLE) FEAT_SVE2 (PF_ARM_SVE2_INSTRUCTIONS_AVAILABLE) FEAT_SVE2p1 (PF_ARM_SVE2_1_INSTRUCTIONS_AVAILABLE) FEAT_SVE_SHA3 (PF_ARM_SVE_SHA3_INSTRUCTIONS_AVAILABLE) FEAT_SVE_AES (PF_ARM_SVE_AES_INSTRUCTIONS_AVAILABLE) FEAT_SVE_BitPerm (PF_ARM_SVE_BITPERM_INSTRUCTIONS_AVAILABLE)
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I think we should add them together with certain improvement of vectorization. |
Yep, I agree with it. |
Seems reasonable, I will take this approach. From the initial discussion on the STL discord, it sounded like the use of |
IsProcessorFeaturePresent is supported by the Windows OS. As you know, SVE requires OS support because its stack manipulation differs from NEON, even if the CPU itself supports the feature. From my perspective, using IsProcessorFeaturePresent would be safer. |
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I'm wondering why crypto stuff (FEAT_SHA3, FEAT_SVE_SHA3, FEAT_SVE_AES) would be needed. |
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I believe that this list comes from the set of features proposed by my team to add to the I don't think the crypto features are going to be used in the STL. |
If you're happy with the perf then I think this is perfectly maintainable, thanks. |
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I would like |
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When creating a new PR, please ensure that your main is up to date, and that your feature branch is properly synced. (Ideally, clean commits rebased on top of main.) Your branch was relative to main as of 2025-10-10 which was pretty old for such a fast-moving file as vector_algorithms.cpp. In this case it made no difference, just something to remember for the future!
| bool _Use_FEAT_AES() noexcept { | ||
| return IsProcessorFeaturePresent(PF_ARM_SVE_AES_INSTRUCTIONS_AVAILABLE); | ||
| } |
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As mentioned in the discussion, the cryptography stuff is going to be unused by the STL, but I am fine with merging all of this for now, then we can garbage-collect the unused functions when we have the full suite of STL vectorized algorithms for ARM64 completed. These are helpers in an unnamed namespace, so they can be removed without fear of breaking the import lib's compatibility.
It should be possible to add a "Vulcan nerve pinch" function, present in the import lib only when building the STL's tests, that allows us to simulate the features being disabled. (We had a worse version of this for ConcRT ages ago, that one was bad because it was exposed to users.) This can be retrofitted in the future. |
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Nit: imperative present tense for commit message + slight typo fix: |
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I'm mirroring this to the MSVC-internal repo. Please notify me if any further changes are pushed, otherwise no action is required. |
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Thanks for adding this feature detection and congratulations on your first microsoft/STL commit! 🦾 6️⃣ 4️⃣ |
Added Arm64 feature detections in STL
FEAT_DotProd (PF_ARM_V82_DP_INSTRUCTIONS_AVAILABLE)
FEAT_I8MM (PF_ARM_V82_I8MM_INSTRUCTIONS_AVAILABLE)
FEAT_SHA3 (PF_ARM_SHA3_INSTRUCTIONS_AVAILABLE)
FEAT_SVE (PF_ARM_SVE_INSTRUCTIONS_AVAILABLE)
FEAT_SVE2 (PF_ARM_SVE2_INSTRUCTIONS_AVAILABLE)
FEAT_SVE2p1 (PF_ARM_SVE2_1_INSTRUCTIONS_AVAILABLE)
FEAT_SVE_SHA3 (PF_ARM_SVE_SHA3_INSTRUCTIONS_AVAILABLE)
FEAT_SVE_AES (PF_ARM_SVE_AES_INSTRUCTIONS_AVAILABLE)
FEAT_SVE_BitPerm (PF_ARM_SVE_BITPERM_INSTRUCTIONS_AVAILABLE)